Full Description
Scope
This standard specifies embeddable and encapsulating markup syntaxes for design intellectual property encryption and rights management, together with recommendations for integration with design specification formats described in other standards. It also recommends use models for interoperable tool and hardware flows, which will include selecting encryption and encoding algorithms and encryption key management. The recommendation includes a description of the trust model assumed in the recommended use models. This standard does not specifically include any consideration of digitally encoded entertainment media. In the context of this document, the term IP will be used to mean electronic design intellectual property. Electronic design intellectual property is a term used in the electronic design community. It refers to a reusable collection of design specifications that represent the behavior, properties, and/or representation of the design in various media. Examples of these collections include, but are not limited to, the following: A unit of electronic system design; A design verification and analysis scheme (e.g., test bench); A netlist indicating elements and the interconnection thereof to implement a function; A set of fabrication instructions; A physical layout design or chip layout; A design intent specification. The term is partially derived from the common practice for the collection to be considered the intellectual property of one party. Hardware and software descriptions are encompassed by this term.
Purpose
The intent of this document is to enable design flows that provide interoperability among IP authors, tool providers, integrators, and users of the IP. The resulting flow identified aids IP authors in providing IP that can be processed by tools without sharing protected information with IP users. Furthermore, this flow can support an integrated licensing scheme, enabling the IP authors to specify compile-time licenses. An integrated rights management scheme is also an element of the flow, which helps IP authors to control tool behavior including, but not limited to, IP visibility, allowed tool versions, and output file encryption.
There is currently no defined, independent standard for describing IP encryption markup for design information formats. Each design format that incorporates IP encryption describes their markup differently, leading to confusing interpretation. Users of those standards also lack a recommended practice for interoperable use of IP encryption.
For the IP author, the digital envelope containing the rights, key, and data blocks is the main focus. This envelope contains the source, encrypted with a symmetric cipher using a one-time session key. The session key is encrypted with a tool vendor public key for each supported vendor arranged in a series of key blocks.
The license constraints and rights constraints are similarly encrypted with a tool vendor public key for each supported vendor arranged in a series of rights blocks.
The tool vendor supporting the standard can then parse and process the envelope and its contents. When the tool vendor finds the blocks with their public keys, each block is decrypted with their private key, thus extracting the data key, licensing requirements, and rights constraints. If required, the tool then checks for the presence of a valid license and, if successful, decrypts the source using the data key and obeying the rights constraints. Output files from the tool may be encrypted for use in downstream tools, provided such action is granted in the IP rights.
A standard defined with all these IP author and tool vendor features would make the overall flow transparent for the IP user. Therefore, this document provides guidelines and recommended practice for use of IP protection markup syntax and key management to enable interoperable tool flows with IP and tools from a wide array of suppliers. It includes algorithm selection for encryption and encoding.
This document also specifies a subset of markup syntax for hardware description language (HDL) formats that could adapted to other file formats. These files represent potential inputs and outputs of tools that would otherwise expose IP. The generic syntax of these directives may be suitably modified for a particular file format if there are syntactic conflicts and variations that may be described in recommended practices.
Abstract
New IEEE Standard - Superseded.
Guidance on technical protection measures to those who produce, use, process, or standardize the specifications of electronic design intellectual property (IP) are provided in this recommended practice. Distribution of IP creates a risk of unsanctioned use and dilution of the investment in its creation. The measures presented here include protection through encryption, specification, and management of use rights that have been granted by the producers of electronic designs, and methods for integrating license verification for granted rights. (The PDF of this standard is available at no cost compliments of the Accellera Systems Initiative at https://ieeexplore.ieee.org/browse/standards/get-program/page)