This document provides terminology, suggested methods, and criteria for characterizing the internal structural features of monolithic, ceramic dielectric capacitors. Its major objective is the accurate evaluation of the internal physical quality of the chip capacitor element as it relates to the functional reliability of the finished capacitor. This Standard also provides needed and useful information pertaining to activities associated with destructive physical analysis (DPA), such as visual inspection and DPA reporting. In addition, it provides tutorial help for problems inherent in DPA sample processing.

Purpose

This specification is primarily applicable to multilayer ceramic chip capacitors. It also contains criteria for radial and axially leaded multilayer ceramic capacitors but is not intended to define lead attachment criteria for other styles of leaded ceramic capacitors such as stacked, leaded capacitors with DIP (dual inline package) lead frames.

DPA is only one test contributing to the complete evaluation of a product lot regarding its fitness for use and its conformance to design and performance specifications. Information from other tests, such as initial electrical testing, voltage conditioning and other electrical and environmental testing that may be imposed, should be considered as well as DPA results. DPA should not be used in place of electrical testing for determining lot quality.