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IEEE 1500-2022

IEEE Standard Testability Method for Embedded Core-based Integrated Circuits

standard by IEEE , 10/12/2022

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Full Description

Scope

IEEE Std 1500 is a standard design-for-testability method for integrated circuits (ICs) containing embedded nonmergeable cores. This method is independent of the underlying functionality of the IC or its individual embedded cores. The method supports the necessary requirements for the test of such ICs, while allowing for ease of interoperability of cores that might have originated from different sources. This method is usable for all classes of digital cores, including hierarchical cores.

Purpose

The aim of IEEE Std 1500 is to provide a consistent scalable solution to the test reuse challenges specific to the reuse of nonmergeable cores, while preserving the IP aspects that are often associated with these cores. This objective is achieved through provision of a core-centric methodology that enables successful integration of cores into SoCs.

Abstract

Revision Standard - Active. A mechanism for the test of core designs within a system on chip (SoC) is defined. This mechanism is a hardware architecture and the core test language (CTL) is leveraged to facilitate communication between core designers and core integrators.
 

Product Details

Published:
10/12/2022
ISBN(s):
9781504488662, 9781504488679, 9781504490436
Number of Pages:
154
File Size:
1 file , 4.4 MB
Product Code(s):
STD25531, STDPD25531, STDPL25687
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This product is unavailable in Russia, Ukraine, Belarus
 

Document History

  1. IEEE 1500-2022

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    IEEE Standard Testability Method for Embedded Core-based Integrated Circuits

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  2. IEEE 1500-2005


    IEEE Standard Testability Method for Embedded Core-based Integrated Circuits

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